Hardware description

The hardware description is a file containing all addresses and parameters of the hardware. It is used to configure the Dma and all GPIO devices.

Variables

Variables

uint32_t DEFAULT_DATA_SIZE = 8

The DEFAULT_DATA_SIZE constant represents the size of each data transfer (per valid clock cycle) in bytes.

The ADC uses 64 bit data transfers by default (meaning 8 byte).

uint32_t DMA_RAW_START_ADDRESS = 0x20000000

The DMA_RAW_START_ADDRESS constant represents the start address of the DMA_RAW buffer.

The DMA buffer is reserved in the physical memory. This constant represents the start address of the DMA buffer. It must match the start address in the device tree.

uint32_t DMA_COUNT_START_ADDRESS = 0x1E800000

The DMA_COUNT_START_ADDRESS constant represents the start address of the DMA_COUNT buffer.

The DMA buffer is reserved in the physical memory. This constant represents the start address of the DMA buffer. It must match the start address in the device tree.

uint32_t DEFAULT_RAW_PACKAGE_SIZE = 0x400000

The DEFAULT_RAW_PACKAGE_SIZE constant represents the the amount of transfers before each DMA interrupt.

The hardware packs together transfers into packages. This constant represents the amount of transfers per package. Calculating DEFAULT_DATA_SIZE * DEFAULT_RAW_PACKAGE_SIZE gives the number of bytes per package (see DEFAULT_RAW_PACKAGE_SIZE_BYTES). It must match the package size set in the hardware design.

uint32_t DEFAULT_COUNT_PACKAGE_SIZE = 0x80000

The DEFAULT_COUNT_PACKAGE_SIZE constant represents the the amount of transfers before each DMA interrupt.

The hardware packs together transfers into packages. This constant represents the amount of transfers per package. Calculating DEFAULT_DATA_SIZE * DEFAULT_COUNT_PACKAGE_SIZE gives the number of bytes per package (see DEFAULT_COUNT_PACKAGE_SIZE_BYTES). It must match the package size set in the hardware design.

uint32_t DEFAULT_RAW_PACKAGE_SIZE_BYTES = DEFAULT_DATA_SIZE * DEFAULT_RAW_PACKAGE_SIZE

The DEFAULT_RAW_PACKAGE_SIZE_BYTES constant represents the the amount of bytes before each DMA interrupt.

The hardware packs together transfers into packages. This constant represents the amount of bytes per package. Calculating DEFAULT_DATA_SIZE * DEFAULT_RAW_PACKAGE_SIZE gives the number of bytes per package.

uint32_t DEFAULT_COUNT_PACKAGE_SIZE_BYTES = DEFAULT_DATA_SIZE * DEFAULT_COUNT_PACKAGE_SIZE

The DEFAULT_COUNT_PACKAGE_SIZE_BYTES constant represents the the amount of bytes before each DMA interrupt.

The hardware packs together transfers into packages. This constant represents the amount of bytes per package. Calculating DEFAULT_DATA_SIZE * DEFAULT_COUNT_PACKAGE_SIZE gives the number of bytes per package.

uint8_t DMA_COUNT = 2

The DMA_COUNT constant represents the amount of ADC channels.

The used ADC has two DMA channels.

uint32_t DMA_RAW_RESERVED_SPACE = 0x10000000

The DMA_RAW_RESERVED_SPACE constant represents the total reserved space for DMA_RAW buffers.

The DMA buffers are reserved in the physical memory. This constant represents the total reserved space. It must match the reserved space in the device tree.

uint32_t DMA_COUNT_RESERVED_SPACE = 0x1800000

The DMA_COUNT_RESERVED_SPACE constant represents the total reserved space for DMA_COUNT buffers.

The DMA buffers are reserved in the physical memory. This constant represents the total reserved space. It must match the reserved space in the device tree.

uint32_t DMA_DESCRIPTOR_BASE = 0x80000000

The DMA_DESCRIPTOR_BASE constant represents the physical location of the DMA descriptor memory.

The DMA descriptor memory is reserved in the physical memory. Block RAM is used in hardware.

uint32_t DMA_DESCRIPTOR_SIZE = 0x40u

The DMA_DESCRIPTOR_SIZE constant represents the size of a DMA descriptor.

This is given by documentation of the DMA.

uint32_t DMA_RAW_DESCRIPTOR_PER_DMA = (DMA_RAW_RESERVED_SPACE / DMA_COUNT) / (DEFAULT_RAW_PACKAGE_SIZE * DEFAULT_DATA_SIZE)

The DMA_RAW_DESCRIPTOR_PER_DMA constant represents the amount of DMA descriptors per DMA_RAW device.

The formula calculates the optimal amount of DMA descriptors per DMA device so that the whole reserved memory is used.

uint32_t DMA_COUNT_DESCRIPTOR_PER_DMA = (DMA_COUNT_RESERVED_SPACE / DMA_COUNT) / (DEFAULT_COUNT_PACKAGE_SIZE * DEFAULT_DATA_SIZE)

The DMA_COUNT_DESCRIPTOR_PER_DMA constant represents the amount of DMA descriptors per DMA_COUNT device.

The formula calculates the optimal amount of DMA descriptors per DMA device so that the whole reserved memory is used.

std::array<DMA_DEVICE, DMA_COUNT> DMAS_RAW = {{{0x80400000, 0, 0, "/dev/udmabuf0", "/dev/uio0"}, {0x80410000, DMA_DESCRIPTOR_SIZE * DMA_RAW_DESCRIPTOR_PER_DMA, 0, "/dev/udmabuf1", "/dev/uio1"}}}

The DMAS_RAW constant represents the DMA devices used for the ADC.

It is used for the raw data.

The first DMA device is used for ADC channel 0, the second DMA device is used for ADC channel 1.

std::array<DMA_DEVICE, DMA_COUNT> DMAS_COUNT = {{{0x80420000, 2 * DMA_DESCRIPTOR_SIZE * DMA_RAW_DESCRIPTOR_PER_DMA, 0x81260000, "/dev/udmabuf2", "/dev/uio2"}, {0x80430000, 2 * DMA_DESCRIPTOR_SIZE * DMA_RAW_DESCRIPTOR_PER_DMA + DMA_DESCRIPTOR_SIZE * DMA_COUNT_DESCRIPTOR_PER_DMA, 0x81270000, "/dev/udmabuf3", "/dev/uio3"}}}
uint32_t GPIO_ENABLED = 0x81200000

The GPIO_ENABLED constant represents the address for the register controlling the enabled state of the ADC channels.

There are 2 ADC channels controlled by one register:

  • bit [0..1]: activate DMA operations of ADC channel 1 and 2

  • bit [2..3]: activate signal inversion of ADC channel 1 and 2

  • bin [4..5]: activate FIR filter of ADC channel 1 and 2

Example: 0b0000000000000101 enables ADC channel 1 for DMA operations and inverts it.

uint32_t GPIO_OFFSET = 0x812B0000

The GPIO_OFFSET constant represents the address for the register controlling the offsets of the ADC signals.

This GPIO uses one register. The register is used to set the offsets of the ADC channels.

There are 2 ADC channels controlled by one register:

  • bit [0..15]: offset of ADC channel 1

  • bit [16..31]: offset of ADC channel 2

The offset sets the number of arbitrary units for shifting the signal of channel 1 and channel 2.

uint32_t GPIO_MEASUREMENT_INTERRUPT = 0x81210000

The GPIO_MEASUREMENT_INTERRUPT constant represents the address for the registers controlling the measurement interrupt.

This GPIO uses two registers. The first is an input register, the second is an output register.

The first register is used to read the status of the measurement.

  • bit [0..1]: stopped status of ADC channel 1 and 2

  • bit [2..3]: DMA raw interrupt status of ADC channel 1 and 2

  • bit [4..5]: DMA count interrupt status of ADC channel 1 and 2

The second register is used to disable further interrupts.

  • bit [0..1]: disable interrupt for ADC channel 0 and 1 (0 = no further interrupts, 1 = interrupts work)

uint32_t GPIO_MEASUREMENT_TIME = 0x81220000

The GPIO_MEASUREMENT_TIME constant represents the address for the register controlling the measurement time.

This GPIO uses one register. The register is used to set the measurement time.

The measurement time is given in ms.

uint32_t GPIO_TRIGGER_VALUE = 0x81240000

The GPIO_TRIGGER_VALUE constant represents the address for the register controlling the trigger values for the ADC channels.

This GPIO uses one register. The register is used to set the trigger values.

There are 2 ADC channels controlled by one register:

  • bit [0..15]: trigger value for ADC channel 1

  • bit [16..31]: trigger value for ADC channel 2

The trigger value is given in a value corresponding to the ADC value.

uint32_t GPIO_LONG_GATE = 0x81230000

The GPIO_LONG_GATE constant represents the address for the register controlling the long gates for the ADC channels.

This GPIO uses one register. The register is used to set the long gates.

There are 2 ADC channels controlled by one register:

  • bit [0..15]: long gate for ADC channel 1

  • bit [16..31]: long gate for ADC channel 2

The long gate sets the number of samples to be measured once a trigger occurs.

uint32_t GPIO_PRE_GATE = 0x81250000

The GPIO_PRE_GATE constant represents the address for the register controlling the pre gates for the ADC channels.

This GPIO uses one register. The register is used to set the pre gates.

There are 2 ADC channels controlled by one register:

  • bit [0..15]: pre gate for ADC channel 1

  • bit [16..31]: pre gate for ADC channel 2

The pre gate sets the number of samples to be measured to be be output before the trigger occurred.

uint32_t GPIO_COUNT_PACKAGE_SIZE = 0x81280000

The GPIO_COUNT_PACKAGE_SIZE constant represents the packages sizes for used for the DMA_COUNT devices.

This GPIO uses two registers. The first register is for Channel 0, the second register is for Channel 1.

Each package is DEFAULT_DATA_SIZE bytes long. DEFAULT_COUNT_PACKAGE_SIZE is the maximum possible package size.

struct DMA_DEVICE
#include <hwdevice.h>

The DMA_DEVICE struct represents a DMA device.

This struct is used to configure the DMA devices used for the ADC.

Public Members

uint32_t mRegister

The register address of the DMA device.

uint32_t mDescriptorOffset

The offset of the DMA descriptor memory.

uint32_t mSignalCountRegister

The register address of the signal count register.

const char *mDmaDevice

The device name of the DMA device.

const char *mUioDevice

The device name of the UIO device.